1. Field of the Invention
The present invention relates to a multilayer printed wiring board for use in electric or electronic components. More particularly, the present invention relates to a multilayer printed wiring board comprising a core member and buildup layers laminated on the core member.
2. Description of the Related Art
Due to the need for increasing the wiring density of an electric/electronic circuit for use in electric/electronic devices, a multilayer printed wiring board including a plurality of conductive layers for mounting electronic components is widely used. Such multilayer printed wiring boards are generally divided into two groups in accordance with the manufacturing method.
One method for forming a multilayer printed wiring board comprises laminating a predetermined number of copper-clad laminates while interposing a prepreg between the two adjacent copper-clad laminates and then pressing the laminated layers under a certain pressure in the thicknesswise direction for integrating the layers. (Hereinafter, this method is referred to as a laminating and pressing method.) The prepreg is formed by impregnating a glass cloth with a resin and hardening the resin to semi-hardened state, i.e., B-stage. In this laminating and pressing method, the prepreg is softened by heating to serve as an adhesive sheet for bonding the copper-clad laminates to each other. The copper-clad laminate is generally formed by laminating a plurality of prepregs on each other to provide a base substrate, bonding a copper foil to either or both surfaces of the base substrate, and then etching the copper foil to form a wiring pattern on the surface or surfaces of the base substrate. After the copper-clad laminates thus formed with wiring patterns are laminated on each other via prepregs, holes are formed, by the use of a drill, at predetermined portions of the copper-clad laminates in the thicknesswise direction. By subsequently forming vias in the holes, the copper-clad laminates are electrically connected to each other, thereby providing a multilayer printed wiring board.
The other one method for forming a multilayer printed wiring board includes the steps of preparing a relatively strong core member, laminating a buildup layer formed of an insulating material on each of opposite surfaces of the core member, forming vias in the buildup layers and forming a wiring pattern on each of the buildup layers. In this method, the lamination of a buildup layer and the subsequent process steps are repeated for providing a multilayer printed wiring board. (Hereinafter, this method is called as a buildup method.) The core member is generally formed by laminating a plurality of prepregs formed by impregnating a glass cloth with a resin. The core member is in advance formed with drill vias. Electrical connection between the wiring patterns formed on the respective buildup layers are provided through the vias formed at predetermined portions of the layers. In this buildup method, minute vias such as photo vias, laser vias and plasma vias can be formed in the buildup layers. For forming the buildup layers, an insulating material which is suitable for forming desired vias is selected.
A multilayer printed wiring board formed by the laminating and pressing method generally has a high modulus of elasticity because of the large number of rigid glass clothes contained in the copper-clad laminates and prepregs. The technique of forming a multilayer printed wiring board using members such as copper-clad laminates and prepregs reinforced by glass clothes is widely known, as disclosed in JP-A-4-309284, JP-A-5-129779, JP-A-7-314607 and JP-A-10-303556. With such a method, however, it is difficult to reduce the thickness of the multilayer printed wiring board because each of the copper-clad laminates and prepregs is relatively thick due to its inclusion of a glass cloth.
Moreover, it is also difficult to increase the density of each wiring pattern because each of the holes for the vias generally has a large diameter of about 0.3 mm or more. This is because the holes need be formed by the use of a drill due to the rigidity of the copper-clad laminates and the prepregs. If the diameter of a hole is decreased for enhancing the wiring density, the likelihood of breakage of the drill due to the glass cloth increases. Moreover, when the number of copper-clad laminates is increased, a drill of a larger diameter capable of perforating such a large number of layers need be used, which causes an increase in diameter of the holes and bars the provision of a wiring pattern having a high density.
As compared with the laminating and pressing method, the buildup method is more advantageous in that it is possible to reduce the thickness of the multilayer printed wiring board because each of the buildup layers does not contain a glass cloth. Moreover, since electrical connection between the respective wiring patterns is provided by small vias such as a photo via, a laser via or a plasma via, it is possible to increase the wiring density of the wiring patterns. In this way, the buildup method is more suitable than the laminating and pressing method for realizing thickness reduction of a multilayer printed wiring board and enhanced wiring density. Thus, a buildup-type multilayer printed wiring board formed by the buildup method is utilized for an MCM (Multi Chip Module) board, for example, which requires a wiring pattern of considerably high density.
However, as compared with a wiring board formed by the laminating and pressing method, a buildup-type multilayer printed wiring board formed by the conventional buildup method warps largely as a result of reflow soldering performed in the manufacturing process or in the process of mounting electronic components thereon. If a wiring board largely warps, undesirably non-contacting bumps may be provided, causing connection failure between electrode pads which are otherwise duly connected. For preventing such connection failure, the warping amount need be not more than 1 mm for a regular size of 510×340 mm for example. The problem of warping of the wiring board becomes more serious when the volume ratio of the buildup layers increases as a result of laminating a large number of the buildup layers.
Moreover, in recent years, the use of a lead-free solder material or a halogen-free flame retardant is demanded in view of environmental problems. For performing reflow soldering using a lead free solder material, a higher reflowing temperature than that for other materials is required. Specifically, the lowest reflowing temperature conventionally required is about 220° C., whereas a high temperature of about 240° C. at the lowest is required for a lead free solder material. However, treatment of the multilayer printed wiring board at such a high temperature causes the wiring board to warp largely. Also with this reason, it is demanded to decrease the amount of warping of the buildup-type multilayer printed wiring board due to reflow soldering.
For reducing the warping amount of the buildup-type printed wiring board, JP-A-53-126164, JP-A-5-140873, JP-A-6-97670, JP-A-7-297511 and JP-A-2000-234239 for example disclose a technique in which a relatively thick core member containing a rigid glass cloth is used and holes are made in the thick core member by the use of a drill without increasing the diameter of the holes. With such a method, however, the thickness of the multilayer printed wiring board cannot be reduced due to the thick core member.
Further, JP-A-11-233941 for example discloses a technique which alleviates warping of the buildup-type multilayer printed wiring board by making some of insulating layers from a prepreg including a glass cloth. However, the forming of insulating layers i.e., build up layers from a prepreg increases the thickness of the wiring board. Therefore, also in this case, it is not possible to respond to the demand for thickness reduction of the wiring board.
JP-A-11-158752 discloses a method which alleviates warping of the buildup-type multilayer printed wiring board by adjusting the picking number of warps and wefts of a glass cloth contained in the core member. Further, JP-A11-273456 discloses adding of an inorganic filler to the insulating material, whereas JP-A2001-7453 discloses the provision of a waste board portion at the core member. However, none of these techniques can realize high density of the wiring pattern and sufficient decrease in the warping amount of the wiring board.